1. Field of the Invention
The present invention relates to analog to digital converters.
2. Description of the Prior Art
There are numerous techniques for converting an analog signal to a digital representation. However, previous analog to digital converter circuits employing these techniques have tended to be either relatively slow or inaccurate, or both. For example, one type of analog to digital converter circuit, known as a successive approximation converter, has an addressable latch in which successive digital approximations to the analog input signal are made. The analog value of the digital latch output is compared to the analog input signal after each approximation. The approximations are usually made starting with the most significant bit of the addressable latch, and trying a binary zero (or one) in each bit position. The binary value in that bit position is kept or changed depending upon the comparison of the associated analog value with the analog input signal.
After all the bit positions have been tested, the binary code remaining in the addressable latch is a digital representation of the analog input voltage. These successive approximation converters can, depending upon the number of bit positions in the addressable latch, provide an accurate, high resolution digital output. However, because the bits are computed one at a time, these circuits are often too slow for many high accuracy applications.
Other types of converters include parallel analog to digital converters such as flash converters which compute all the bits (or a group of bits) of the digital output in parallel such that the conversion is done very quickly. However, the accuracy of these circuits is often not very great and the circuits tend to be very large for applications requiring a high resolution output. For example, a typical design for a 2-bit flash converter has four equal series-connected resistors connected to a reference voltage, and four comparators, with one input of each of the comparators connected to a corresponding resistor. The voltages across each of the resistors provide four distinct reference voltages to the four comparators which compare these voltage levels to the analog input signal. Combinational logic converts the outputs of the four comparators to a 2-bit digital representation of the analog input signal.
As seen above, a 2-bit parallel flash converter has four comparators. In general, the number of comparators utilized in a flash converter increases by a factor of two for each additional bit of accuracy. Thus, a 3-bit flash converter typically has eight comparators and a 4-bit flash converter has sixteen converters. Accordingly, it is readily seen that for high accuracy applications requiring a large number of bits, a flash converter can grow unrealizably large and complicated. Some converter circuits have utilized sequentially operated flash converter circuits to reduce the complexity of the circuits, but this approach is not readily adaptable to high resolution converters of twelve bits or more.